1. Field of the Invention
The present invention relates to a method for forming a polysilicon germanium layer, and more particularly to a method for forming a polysilicon germanium layer on an oxide layer without forming a polysilicon seed layer therebetween.
2. Description of the Related Art
Advances in semiconductor manufacturing technology have led to the integration of tens, and more recently, hundreds of millions of circuit elements, such as transistors, on a single integrated circuit (IC). In order to achieve such increases in density, not only have interconnect line widths become smaller, but so have the dimensions of metal-oxide-semiconductor field effect transistors. MOSFETs are also sometimes referred to as insulated gate field effect transistors (IGFETs). Most commonly, theses devices are referred to simply as FETs, and are so referred to in this disclosure.
Transistor scaling typically involves more than just the linear reduction of the FET width and length. For example, both source/drain (S/D) junction depth and gate insulator thickness are also typically reduced in order to produce a FET with the desired electrical characteristics.
As is well known, the gate electrode of a FET is commonly formed from a patterned layer of polycrystalline silicon. Polycrystalline silicon is also referred to polysilicon. The polysilicon gate electrodes are commonly doped such that the gate electrodes of n-channel FETs (NFETs) are n-type, and the gate electrodes of p-channel FETs (PFETs) are p-type.
Since doped polysilicon is a semiconductive material, it tends to experience the formation of a depletion region adjacent to the interface between the gate electrode and the gate insulator (also referred to as the gate dielectric) when a voltage is applied to the gate electrode. As transistor scaling has substantially reduced the thickness of the gate insulator layer, the width of the depletion region in the doped polysilicon gate electrode has come to play a more significant role in determining the electrical characteristics of the FET. Unfortunately, the occurrence of this depletion region in the gate electrode tends to degrade transistor performance. In order to solve the gate depletion effect, the widely used polysilicon as gate electrode is replaced with poly silicon germanium (SiGe) since poly SiGe has less gate depletion effect. However, since poly SiGe is used as gate electrode material, poly SiGe must be formed on a gate oxide layer. Unlike polysilicon, the surface quality of poly SiGe directly formed on an oxide layer is usually poor even rough. This is because direct deposition of poly SiGe on an oxide layer would induce partial nucleation thereby form a poly SiGe gate electrode with a rough surface. FIGS. 1A and 1B show a photograph and a figure of a direct deposition of poly SiGe on an oxide layer respectively. As shown in FIGS. 1A and 1B, a poly SiGe layer 104 is formed on an oxide layer 102 wherein the oxide layer 102 is formed on a wafer 100. The undesired roughness of a poly SiGe gate electrode surface could induce several problems such as the quality of the later formed film.
To solve the problems caused by the surface roughness of a poly SiGe gate electrode, a polysilicon seed layer is usually formed on the gate oxide layer before depositing the poly SiGe gate electrode. FIGS. 2A and 2B show a photograph and a figure of a poly SiGe layer, an additional polysilicon seed layer and an oxide layer on a wafer respectively. As shown in FIGS. 2A and 2B, a poly SiGe layer 204 is formed on a polysilicon seed layer 206, and the polysilicon seed layer 206 is formed an oxide layer 202, and the oxide layer 202 is formed on a wafer 200. However, the additional polysilicon seed layer between the poly SiGe gate electrode layer and the gate oxide layer would degrade the performance of the poly SiGe gate electrode. Moreover, adding an additional polysilicon seed layer means additional process cost, excess process variable and lower performance of the gate electrode.
Thus it is necessary to provide a new method for forming a polysilicon germanium layer. It is towards those goals that the present invention is specifically directed.